Various ring oscillator are known in the prior art. Inverters are used as delay elements and are interconnected in a closed ring. An amount of delay of each delay element is controlled by controlling a flow of current available for charging of parasitic capacitance associated with each inverter.
Ring oscillator design presents various challenges. Some oscillator designs of the prior art have limited high frequency operation. Some other oscillator designs have an oscillation frequency or amplitude that vary over a wide spread in relation to variability in a process used in fabricating such oscillators. Still other oscillator designs have substantial sensitivity to power supply variability and have asymmetric rise and fall times.
What is needed in a ring oscillator that provides high frequency operation, substantially symmetric rise and fall time, while limiting spread in oscillation frequency and spread in amplitude in relation to fabrication process variability and power supply variability.